── ACTIVE / HARDWARE

FPGA Quantum Error Decoder

Neural-network-based syndrome decoder for quantum error correction. Trained on Stim-generated syndrome data, quantized via Brevitas, synthesized to FPGA via FINN, and benchmarked against PyMatching. Targets the latency profile required for real-time error correction on physical quantum hardware.

── PIPELINE

Build & Deployment Flow

Stim

Generate syndrome data from quantum error correction circuits

PyTorch + Brevitas

Train quantization-aware neural network on syndrome → correction mapping

FINN

Compile quantized network to FPGA-synthesizable HLS

Vivado + PYNQ-Z2

Synthesize and deploy to Xilinx FPGA

Benchmark

Compare latency and accuracy against PyMatching CPU baseline

── PROBLEM

Quantum error correction requires decoding syndrome measurements into corrections fast enough to keep up with physical qubit error rates. The standard CPU-based decoder, PyMatching, achieves high accuracy but its latency does not meet the microsecond-scale deadlines that real-time error correction demands.

FPGA-based neural decoders trade some accuracy for the deterministic low-latency profile FPGAs provide. This project builds an end-to-end Stim-to-PYNQ pipeline and measures where on the accuracy/latency tradeoff curve the trained network lands.

── TECH STACK

Software

Python, PyTorch
Stim (syndrome simulation)
Brevitas (quantization-aware training)
FINN (FPGA compilation)
PyMatching (CPU baseline)

Hardware

PYNQ-Z2 (Xilinx Zynq-7000)
Xilinx Vivado synthesis flow
HLS-based deployment

→ source on github ← previous: osint engine